The present invention relates to automatic test equipment, and more particularly to automated parametric test systems for determining the characteristics of integrated circuits during the development of processes for manufacturing such circuits. More specifically, the present invention is concerned with a system for controlling automated parametric testers in a manner which facilitates the development of tests and improves the documentation, reusability and maintainability of programs for performing testing routines.
In the development of processes for manufacturing integrated circuits, it is necessary to frequently conduct tests on wafers manufactured by the process, to determine whether structures on the wafers meet desired specifications. Accordingly, once a process is developed, a sample of wafers is manufactured in accordance with the process and parametric tests are performed on the wafers to determine the effects the process may have on operating characteristics of circuit devices within the wafer. For example, it may be necessary to determine the gate leakage current of an MOS transistor or the breakdown voltage of a capacitor. During a typical process development cycle, it may be necessary to create several different parametric tests and to frequently modify them in response to test results and other ongoing developments. Once the development of the process is completed, further parametric testing is occasionally carried out to monitor the process.
In the past, the programs for controlling the parametric testing equipment to carry out specific tests on a wafer have been custom designed for each new application. In other words, details concerning the design of the structure to be tested and the specific tests to be performed on that structure were hard-coded into the program. These two different types of information were intertwined throughout the program. For every new wafer design or device that was to be tested, or for each new series of tests that were to be performed on a wafer, an entirely new program had to be written. Even if the same type of structure was to be tested but in a different location from a previously tested structure, new code had to be written to describe the new test.
As integrated circuit processes become more complex and expensive, increasingly more sophisticated and comprehensive parametric tests are being performed in an effort to maximize the information that is obtained from each lot of wafers. Due to the practice of custom designing a control program for each new application, the turnaround time between the development of the new process and the receipt of feedback information relating to that process is becoming unacceptably long. Typically, it might take months for each new program to be written and checked for correctness, and hence information provided by the results of that program can not be obtained in the meantime.
Further, because each program is specifically designed for a particular application, there is generally not much reuse of individual programs. As such, there is very little tendency to document the programs as they are being written, and hence they become difficult to maintain.